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A 3T-2R non-volatile ternary content-addressable-memory (nvTCAM) is proposed. Using a voltage limiter and self-controlled bias circuit, both faster match line development and more sensing margin were possible when compared to the conventional nvTCAM. The voltage limiter provides a clear distinction between mismatch cell and ‘don't care’ cell. In case of nvTCAM made of non-volatile memory (NVM) with a large resistance ratio, the sensing delay is reduced by 43.7% thanks to the combination of the self-controlled bias circuit and voltage limiter. The proposed circuit works properly with NVM with resistance ratio as low as 3. The proposed nvTCAM cell was evaluated using a 65 nm CMOS process.
References
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-
1)
-
3. Chang, M.-F., Chuang, C.-H., Chiang, Y.-N., et al: ‘Designs of emerging memory based non-volatile TCAM for internet-of-things (IoT) and big-data processing: a 5T2R universal cell’. IEEE Int. Symp. on Circuits and Systems, Montreal, Canada, May 2016, pp. 1142–1145, .
-
2)
-
1. Pagiamtzis, K., Sheikholeslami, A.: ‘Content-addressable memory circuits and architectures’, IEEE J. Solid-State Circuits, 2006, 41, (3), pp. 712–727, .
-
3)
-
2. Chang, M.-F., Huang, L.-Y., Lin, W.-Z., et al: ‘A ReRAM-based 4T2R nonvolatile TCAM using RC-filtered stress-decoupled scheme for frequent-OFF instant-ON search engines used in IoT and big-data processing’, IEEE J. Solid-State Circuits, 2016, 51, (11), pp. 2786–2798, .
http://iet.metastore.ingenta.com/content/journals/10.1049/el.2017.1027
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