3T-2R non-volatile TCAM with voltage limiter and self-controlled bias circuit

3T-2R non-volatile TCAM with voltage limiter and self-controlled bias circuit

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A 3T-2R non-volatile ternary content-addressable-memory (nvTCAM) is proposed. Using a voltage limiter and self-controlled bias circuit, both faster match line development and more sensing margin were possible when compared to the conventional nvTCAM. The voltage limiter provides a clear distinction between mismatch cell and ‘don't care’ cell. In case of nvTCAM made of non-volatile memory (NVM) with a large resistance ratio, the sensing delay is reduced by 43.7% thanks to the combination of the self-controlled bias circuit and voltage limiter. The proposed circuit works properly with NVM with resistance ratio as low as 3. The proposed nvTCAM cell was evaluated using a 65 nm CMOS process.


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