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Three-dimensional AND flash memory

Three-dimensional AND flash memory

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High-density and high-speed charge-trapping AND flash memory array is fabricated for the first time. A reliability of 104 endurance cycles and uniform program/erase characteristics along with a threshold voltage window >3 V is obtained. The AND array has several advantages, such as high read current drivability regardless of the number of word-lines, immunity to back-pattern dependency, and fast bit-sensing speed based on a parallel connected cell array structure, which are highly appropriate for three-dimensional (3D) stacking. Finally, a novel 3D stacked vertical-AND array is proposed to surpass the limitations of the conventional 3D NAND flash memories.

References

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      • 6. Nozoe, A., Yamazaki, T., Sato, H., et al: ‘A 3.3 V high-density AND flash memory with 1 ms/512B erase & program time’. IEEE ISSCC Dig. Tech. Papers, 1995, pp. 124125, doi: 10.1109/ISSCC.1995.535458.
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