© The Institution of Engineering and Technology
Novel finite impulse response architectures for wide passband droop compensation of cascaded integrator-comb filters are presented. Compared with the recent wide-band compensators introduced in the literature, the proposed systems achieve better passband droop correction with lower power dissipation, lower hardware utilisation and higher maximum frequency of operation, as validated with post-place-and-route information from FPGA-based implementations.
References
-
-
1)
-
2. Fa-Long, L.: ‘Digital front-end in wireless communications and broadcasting: circuits and signal processing’ (Cambridge University Press, New York, USA, 2011).
-
2)
-
9. Romero, D.E.T., Dolecek, G.J.: ‘Application of amplitude transformation for compensation of comb decimation filters’, Electron. Lett., 2013, 49, (16), pp. 985–987 (doi: 10.1049/el.2013.1492).
-
3)
-
4. Dolecek, G.J., Garcia, R., Salgado, G., De la Rosa, J.: ‘Novel multiplierless wideband comb compensator with high compensation capability’, Circuits Syst. Signal Process., 2016, pp. 1–19, .
-
4)
-
7. Molnar, G., Vucic, M.: ‘Closed-form design of CIC compensators based on maximally-flat error criterion’, IEEE Trans. Circuits Syst. II, 2011, 58, (12), pp. 926–930 (doi: 10.1109/TCSII.2011.2172522).
-
5)
-
1. Hogenauer, E.B.: ‘An economical class of digital filters for decimation and interpolation’, IEEE Trans. Acoust. Speech Signal Process., 1981, ASSP-29, (2), pp. 155–162 (doi: 10.1109/TASSP.1981.1163535).
-
6)
-
3. Jimenez, M.C., Romero, D.E.T., Dolecek, G.J., Laddomada, M.: ‘Wide-band CIC compensators based on amplitude transformation’. IEEE Int. Caribbean Conf. on Devices, Circuits and Systems, Playa del Carmen, Mexico, April 2014, pp. 985–987.
-
7)
-
6. Pecotic, M.G., Molnar, G., Vucic, M.: ‘Design of CIC compensators with SPT coefficients based on interval analysis’, IEEE Int. Conv. MIPRO'12, Opatija, Croatia, May 2012, pp. 123–128.
-
8)
-
9. Hashemi, S.A., Nowrouzian, B.: ‘Particle swarm optimization of FRM FIR digital filters over the CSD multiplier coefficient space’. IEEE Int. Midwest Symp. on Circuits and Systems, Seattle, WA, USA, August 2010, pp. 1246–1249.
-
9)
-
8. Aksoy, L., Flores, P., Monteiro, J.: ‘A tutorial on multiplierless design of FIR filters: algorithms and architectures’, Circuits Syst. Signal Process., 2014, 33, pp. 1689–1719 (doi: 10.1007/s00034-013-9727-8).
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