References

• 1. 1)
     • 3. Wu, X., Saxena, V., Zhu, K.: ‘Homogeneous spiking neuromorphic system for real-world pattern recognition’, IEEE Trans. Emerg. Sel. Top. Circuits Syst., 2015, 5, (2), pp. 254–266 (doi: 10.1109/JETCAS.2015.2433552).
  2. 2)
     • 9. Strukov, D.B., Snider, G.S., Stewart, D.R., Williams, R.S.: ‘The missing memristor found’, Nature, 2008, 453, (7191), pp. 80–83 (doi: 10.1038/nature06932).
  3. 3)
     • 11. Khanal, G.M., Cardarilli, G.C., Chakraborty, A., et al: ‘A ZnO/rGO composite thin film discrete memristor’. 2016 IEEE Int. Conf. on Semiconductor Electronics (ICSE) (IEEE-ICSE2016), August 2016.
  4. 4)
     • 4. Linares-Barranco, B., Serrano-Gotarredona, T., Camuñas-Mesa, L., et al: ‘On spike-timing-dependent-plasticity, memristive devices, and building a self-learning visual cortex’, Front. Neurosci., 2011, 5, p. 26.
  5. 5)
     • 10. Snider, G.S.: ‘Spike-timing-dependent learning in memristive nanodevices’. IEEE Int. Symp. on Nanoscale Architectures, NANOARCH 2008, 2008, pp. 85–92.
  6. 6)
     • 12. Abbott, L.F.: ‘Lapicque's introduction of the integrate-and-fire neuron model’, Brain Res. Bull., 1999, 50, (5–6), pp. 303–304 (doi: 10.1016/S0361-9230(99)00161-6).
  7. 7)
     • 5. Serrano-Gotarredona, T., Linares-Barranco, B.: ‘Design of adaptive nano/CMOS neural architectures’. 19th IEEE Int. Conf. on Electronics, Circuits and Systems (ICECS), 2012, pp. 949–952.
  8. 8)
     • 1. Chua, L.: ‘Memristor-the missing circuit element’, IEEE Trans. Circuit Theory, 1971, 18, (5), pp. 507–519 (doi: 10.1109/TCT.1971.1083337).
  9. 9)
     • 7. Likharev, K.K.: ‘Crossnets: neuromorphic hybrid CMOS/nanoelectronic networks’, Sci. Adv. Mater., 2011, 3, (3), pp. 322–331 (doi: 10.1166/sam.2011.1177).
  10. 10)
      • 8. Indiveri, G., Linares-Barranco, B., Hamilton, T., et al: ‘Neuromorphic silicon neuron circuits’, Front. Neurosci., 2011, 5, p. 73.
  11. 11)
      • 13. Li, Y., Zhong, Y., Xu, L., et al: ‘Ultrafast synaptic events in a chalcogenide memristor’, Sci. Rep., April 2013, 3.
  12. 12)
      • 14. Xinyu, W., Saxena, V., Zhu, K., et al: ‘A CMOS spiking neuron for brain-inspired neural networks with resistive synapses and in situ learning’, IEEE Trans. Circuits Syst. II, Express Briefs, 2015, 62, (11), pp. 1088–1092 (doi: 10.1109/TCSII.2015.2456372).
  13. 13)
      • 9. Bi, G.-Q., Poo, M.-M.: ‘Synaptic modifications in cultured hippocampal neurons: dependence on spike timing, synaptic strength, and postsynaptic cell type’, J. Neurosci., 1998, 18, (24), pp. 10464–10472.
  14. 14)
      • 6. Acciarito, S., Cristini, A., Nunzio, L.D., et al: ‘An a VLSI driving circuit for memristor-based STDP’. 12th Conf. on Ph.D. Research in Microelectronics and Electronics (PRIME), 2016, accepted paper.