Multiple off-the-shelf test-fixtures are available to interface a device-under-test (DUT) to an impedance analyser to characterise its electrical properties. The impact of three available fixtures on the measured impedance of a low-resistance, low-inductance DUT requiring high-frequency (≥100 MHz) characterisation are compared with a custom fixture. The custom fixture is shown to provide a higher accuracy than the off-the-shelf fixtures, highlighting that low-resistance, low-inductance devices require carefully constructed fixtures for characterisation. The experimental results collected using the fixtures are validated against a finite-element-analysis model of the DUT.

References

1. 1)
  - 6. Josifovic, I., Popovic-Gerber, J., Ferreira, J.A.: ‘SiC JFET switching behavior in a drive inverter under influence of circuit parasitics’. Proc. Int. Conf. Power Electronics ECCE Asia, Jeju, South Korea, May 30–June 3 2011, pp. 1087–1094.
2. 2)
  - 3. Kim, J., Lee, W., Shim, Y., Shim, J.: ‘Chip-package hierarchical power distribution network modeling and analysis based on a segmentation method’, Trans. Adv. Packag., 2010, 33, (3), pp. 647–659 (doi: 10.1109/TADVP.2010.2043673).
3. 3)
  - 9. Lemmon, A., Graves, R., Gafford, J.: ‘Evaluation of 1.2 kV, 100A SiC modules for high-frequency, high-temperature applications’. Proc. IEEE Applied Power Electronics Conf. Exposition (APEC), Charlotte, USA, March 2015, pp. 789–793.
4. 4)
  - 1. Agilent Technologies: ‘Evaluating DC–DC converters and PDN with the E5061B LF-RF network analyzer’ September 2012.
5. 5)
  - 10. Lemmon, A., Graves, R.: ‘Parasitic extraction procedure for silicon carbide power modules’. Proc. Int. Workshop on Integrated Power Packaging, Chicago, USA, May 2015, pp. 91–94.
6. 6)
  - 11. Yang, L., Odendaal, W.: ‘Measurement-based method to characterize parasitic parameters of the integrated power electronics modules’, Trans. Power Electron., 2007, 22, (1), pp. 54–62 (doi: 10.1109/TPEL.2006.886615).
7. 7)
  - 5. Chen, Z.: ‘Characterization and modeling of high-switching-speed behavior of SiC active devices’. MS thesis, Virginia Polytechnic Institute, 2009.
8. 8)
  - 16. Lemmon, A., Mazzola, M., Gafford, J., et al: ‘Instability in half-bridge circuits switched with wide band-gap transistors’, IEEE. Trans. Power Electr., 2014, 28, (5), pp. 2380–2392 (doi: 10.1109/TPEL.2013.2273275).
9. 9)
  - 8. Liu, Z., Huang, X., Lee, F.C., Li, Q.: ‘Package parasitic inductance extraction and simulation model development for the high-voltage cascode GaN HEMT’, Trans. Power Electron., 2014, 29, (4), pp. 1977–1985 (doi: 10.1109/TPEL.2013.2264941).
10. 10)
  - 2. Chua, E., Li, X., Hu, S., See, K.: ‘Measurement of power distribution network impedance using an error analysis approach’. Proc. Electronics Packaging Technology Conf., Singapore, December 2014, no. 1, pp. 117–121.
11. 11)
  - 4. Agilent Technologies: ‘Ultra-low impedance measurements using 2-port measurements’ (Agilent Technologies, Santa Clara, USA, 2007).

Fixturing impacts on high-frequency low-resistance, low-inductance impedance measurements

References

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