Multi-level cell STT-RAM controller for multimedia applications
Recently, multi-level cell (MLC) spin-transfer torque random access memories (STT-RAMs) are attracting great attentions as an alternative to static or dynamic random access memories. They have the benefits of capacity, but the penalties of performance, and power consumption caused by a complicated two- or three-phase access. An MLC STT-RAM controller that eliminates the MLC STT-RAM penalties for multimedia applications is proposed. The key ideas are frame-level data-to-memory mapping and frame-type aware frame assignment techniques that make a two- or three-phase access no longer required. Experimental results show that the proposed MLC STT-RAM controller achieves 56.1% higher memory performance, and 4.2% lower memory power consumption than the conventional controller for industrial multimedia applications.