© The Institution of Engineering and Technology
An electrostatic discharge (ESD) protection circuit with novel structure based on a silicon-controlled rectifier (SCR) is proposed for 5 V ESD protection of integrated circuits. The proposed ESD protection circuit has large current driving capacity due to its low on-resistance and high ESD robustness in comparison with the conventional SCR-based ESD protection circuit. The conventional SCR-based ESD protection circuit and the proposed ESD protection circuit were fabricated using a 0.18 µm bipolar CMOS-double diffused metal-oxide semiconductor transistor (DMOS) process, and their electrical characteristics and ESD robustness were comparatively analysed using transmission line pulse measurements.
References
-
-
1)
-
3. Ker, M.-D., Hsu, K.-C.: ‘Overview of on-chip electrostatic discharge protection design with SCR-based devices in CMOS integrated circuits’, Trans. Device Mater. Reliab., 2005, 5, (2), pp. 235–249 (doi: 10.1109/TDMR.2005.846824).
-
2)
-
2. Vashchenko, V., Concannon, A., Ter Beek, M., Hopper, P.: ‘High holding voltage cascaded LVTSCR structures for 5.5 V tolerant ESD protection clamps’, Trans. Devices Mater. Reliab., 2004, 4, pp. 273–280 (doi: 10.1109/TDMR.2004.826584).
-
3)
-
1. Ker, M.-D., Yen, C.-C.: ‘Investigation and design of on-chip power-rail ESD clamp circuits without suffering latchup-like failure during system-level ESD test’, J. Solid-State Circuit, 2008, 43, (11), pp. 2533–2345 (doi: 10.1109/JSSC.2008.2005451).
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