© The Institution of Engineering and Technology
The implementation of on-chip inductors in integrated circuit application remains a challenge to satisfy the requirements of high Q-factor, small area consumption, limited parasitic coupling, ease of layout, and manufacture. Fortunately, the emerging technology of through-silicon via (TSV) offers a possible solution to this issue by developing 3D inductor with solenoid architecture. A simple and accurate inductance model of 3D inductor based on TSV is exploited by analytical method. The inductance results obtained from the proposed model and finite element method exhibit good agreement with various design parameter ranges, and the errors between the results of the proposed analytical model and measurement are <7.5%, which verifies the accuracy of the model.
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in brief
Simple and accurate inductance model of 3D inductor based on TSV