© The Institution of Engineering and Technology
The local optima escaping ability, which is critical for both accuracy and efficiency of CMOS-type Ising chips, is greatly affected by the probability to accept a worse state. Theoretically, such probability is determined by both energy barriers and temperature. However, due to the implementation complexity, the energy barrier is not considered in existing CMOS-type Ising chips. We propose a double random source based method, which re-correlates the probability above with the energy barrier, while eliminating calculating the energy barrier for low cost is proposed. The experiments demonstrate that the method can improve the accuracy of CMOS-type Ising chips by 7.6%, confining the error within 1%. Moreover, it can accelerate the convergence process by 100×.
References
-
-
1)
-
4. COPhy Junior Research Group: ‘Spin Glass Server’, .
-
2)
-
2. Yoshimura, C., Yamaoka, M., Hayashi, M., et al: ‘Uncertain behaviours of integrated circuits improve computational performance’, Sci. Rep., 2015, 5, p. 16213 (doi: 10.1038/srep16213).
-
3)
-
1. Yamaoka, M., Yoshimura, C., Okuyama, T., Aoki, H., Mizuno, H.: ‘A 20k-spin Ising chip to solve combinatorial optimization problems with CMOS annealing’, J. Solid-State Circuit, 2016, 51, (1), pp. 303–309 (doi: 10.1109/JSSC.2015.2498601).
-
4)
-
3. Kahruman, S., Kolotoglu, E., Butenko, S., Hicks, I.V.: ‘On greedy construction heuristics for the max-cut problem’, Int. J. Comput. Sci. Eng., 2007, 3, (3), pp. 211–218 (doi: 10.1504/IJCSE.2007.017827).
-
5)
-
5. Isakov, S.V., Zintchenko, I.N., Ronnow, T.F., Troyer, M.: ‘Optimised simulated annealing for Ising spin glasses’, Comput. Phys. Commun., 2015, 192, pp. 265–271 (doi: 10.1016/j.cpc.2015.02.015).
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