access icon free Double random sources: low-cost method to enhance local optima escaping ability in CMOS-type Ising chips

The local optima escaping ability, which is critical for both accuracy and efficiency of CMOS-type Ising chips, is greatly affected by the probability to accept a worse state. Theoretically, such probability is determined by both energy barriers and temperature. However, due to the implementation complexity, the energy barrier is not considered in existing CMOS-type Ising chips. We propose a double random source based method, which re-correlates the probability above with the energy barrier, while eliminating calculating the energy barrier for low cost is proposed. The experiments demonstrate that the method can improve the accuracy of CMOS-type Ising chips by 7.6%, confining the error within 1%. Moreover, it can accelerate the convergence process by 100×.

Inspec keywords: CMOS integrated circuits; field programmable gate arrays

Other keywords: FPGA; local optima escaping ability; energy barrier; CMOS-type Ising chips

Subjects: Logic and switching circuits; CMOS integrated circuits; Logic circuits

References

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http://iet.metastore.ingenta.com/content/journals/10.1049/el.2016.2218
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