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Low-power time-based ADC with alternating time-residue amplification

Low-power time-based ADC with alternating time-residue amplification

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A time-based analogue-to-digital converter (ADC) that can exhibit both low power and high resolution is introduced. By amplifying alternate time residues and successively subtracting the comparator-induced timing offset, both fast conversion speed of 2N cycles for an N-bit converter and very small input-referred timing offset are achieved. For a 12-bit ADC implemented in a 0.18 µm CMOS process, an effective number of bits of 10.8 has been measured at a sampling frequency of 100 kHz, while consuming 30 µW of total power.

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http://iet.metastore.ingenta.com/content/journals/10.1049/el.2016.0831
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