Security implications of simultaneous dynamic and leakage power analysis attacks on nanoscale cryptographic circuits

Security implications of simultaneous dynamic and leakage power analysis attacks on nanoscale cryptographic circuits

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The implications of simultaneous differential power analysis (DPA) and leakage power analysis (LPA) attacks are investigated on nanoscale cryptographic circuits which employ dynamic voltage scaling (DVS) or aggressive voltage scaling techniques. As compared with individually performing a DPA or an LPA attack on the corresponding cryptographic circuits, the number of required plaintexts to disclose the key with a 0.9 success rate reduces by 93.5% (as compared with DPA attacks) and 93.06% (as compared with LPA attacks), respectively, when the variance of supply voltage is 0.0833 V 2.


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