access icon free Digital bilinear feedback for low-power double-sampling sigma–delta modulators

A novel double-sampling (DS) technique for use in sigma–delta modulators (ΣΔMs) is presented. The proposed technique uses a digital bilinear filter in the feedback path of the modulator loop. The bilinear filter suppresses the quantisation noise folding (QNF) that results from the DS path mismatch. Unlike other solutions for the QNF, the digital implementation of this filter allows the sharing of the input sampling capacitor with the feedback sampling capacitor without any additional analogue gain stages. This way, the power consumption in the input signal buffer can be greatly reduced, because it benefits from the nullator effect at the input of the ΣΔM loop, and hence the current needed to drive the shared sampling capacitor is drastically reduced. Moreover, the proposed DS technique is also suitable for a single-ended circuit implementation of DS.

Inspec keywords: interference suppression; low-power electronics; circuit noise; power consumption; digital filters; circuit feedback; sigma-delta modulation

Other keywords: feedback path; feedback sampling capacitor; single-ended circuit; input signal buffer; modulator loop; quantisation noise folding suppression; double-sampling path mismatch; QNF; power consumption; low-power double-sampling sigma-delta modulators; input sampling capacitor; digital bilinear feedback; digital bilinear filter

Subjects: Electromagnetic compatibility and interference; A/D and D/A convertors; A/D and D/A convertors; Digital filters; Digital filters

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http://iet.metastore.ingenta.com/content/journals/10.1049/el.2014.3016
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content/journals/10.1049/el.2014.3016
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