Hot-carrier-induced device degradation of high-voltage p-type lateral diffused metal–oxide semiconductor (LDMOS) transistors is investigated. A two-stage linear region drain current (I _Dlin) shift (I _Dlin shift increases rapidly at the beginning of stress but tends to saturate when the stress time is longer) is observed. Technology computer-aided-design simulations and direct current current–voltage measurement results suggest that the decrease of residual fabrication interface traps (N _IT) leads to an initial increase in I _Dlin shift. On the other hand, two competing mechanisms, i.e. increase in N _IT generation and increase in electron trapping, are responsible for the saturated I _Dlin shift when the stress time is longer.

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Two-stage hot-carrier-induced degradation of p-type LDMOS transistors

References

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