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Sub-threshold SRAM bit cell pnn for VDDmin and power reduction

Sub-threshold SRAM bit cell pnn for VDDmin and power reduction

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The bit cell is a key component that determines the VDDmin and power consumption of a sub-threshold static random access memory (SRAM). A new bit cell with a pnn-type latch structure is proposed. The analysis and measurement results indicate that the pnn bit cell outperforms the conventional bit cells in terms of VDDmin and power reduction.

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http://iet.metastore.ingenta.com/content/journals/10.1049/el.2014.2357
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