Digital PLL-based frequency synthesis: effect of loop filter shape on required DCO frequency resolution
In digital phase-locked loops (PLLs), the finite resolution of digital representation (quantisation) could pose problems, including jitter peaking and limit-cycle behaviour; both could ruin the frequency stability of a PLL. The resolution of the digitally controlled oscillator (DCO) in the PLL is limited by the smallest dimension available in a given process technology. Currently, one resorts to exhaustive time-domain simulations to ensure correct operation of a PLL. Using a behavioural model of a PLL as verification, how to choose the DCO resolution without resorting to time-domain simulations is investigated. The conditions on signal statistics for correct behaviour are repeated and the analysis to estimate the required resolution is provided. As it turns out, the root-mean-square value of the frequency deviation – neglecting quantisation – is the coarsest possible DCO resolution. One can estimate this value accurately by the integration of its power-spectral density, derived from the well-known phase-domain model of a PLL.
