Comparison of Verilog-A compact modelling strategies for spintronic devices

Comparison of Verilog-A compact modelling strategies for spintronic devices

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Magnetic random access memory based on magnetic tunnel junctions (MTJs) is among the most attractive technologies of emerging non-volatile memories. However, the integration of spin-based devices in integrated circuits is still hindered by a lack of established standard electrical simulator models. Many of such models have been proposed during the past decade which can be classified into two categories: the first ones are based on the physical Landau-Lifshitz-Gilbert (LLG) equation describing real-time MTJ magnetic switching dynamics; the second one uses analytical expressions for switching thresholds derived from the LLG equation. The aim of this reported work was to investigate for the first time the capability of each strategy to fulfil the need of industrial standard electrical simulation tools and pave the path towards a standard industrial model. Multi-simulator compatibility, efficient runtime, accuracy and reliability are the three main assets of a device model. It is shown that using the Cadence® tools suite with the Spectre® simulator, the LLG modelling strategy overcomes the analytical approach in terms of accuracy and speed with a 7× faster runtime. Both models require nearly the same hardware memory resources.


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