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Memristor-based neuron circuit and method for applying learning algorithm in SPICE

Memristor-based neuron circuit and method for applying learning algorithm in SPICE

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The learning of nonlinearly separable functions in cascaded memristor crossbar circuits is described and the feasibility of using them to develop low-power neuromorphic processors is demonstrated. This is the first study evaluating the training of memristor crossbars through SPICE simulations. It is important to capture the alternate current paths and wire resistance inherent in these circuits. The simulations show that neural network learning algorithms are able to train in the presence of alternate current paths and wire resistances. The fact that the approach reduces the area by three times and power by two orders of magnitude compared with the existing approaches that use virtual ground opamps to eliminate alternate current paths is demonstrated.

References

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      • 2. Chabi, D., Zhao, W., Querlioz, D., Klein, J.-O.: ‘Robust neural logic block (NLB) based on memristor crossbar array’. IEEE/ACM Int. Symp. Nanoscale Architectures, San Diego, CA, USA, June 2011, pp. 137143.
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      • 3. Zamarreño-Ramos, C., Camuñas-Mesa, L.A., Pérez-Carrasco, J.A., Masquelier, T., Serrano-Gotarredona, T., Linares-Barranco, B.: ‘On spike-timing-dependent-plasticity, memristive devices, and building a self-learning visual cortex’, Front. Neurosci. Neuromorphic Eng., 2011, 5, pp. 122, Article 26.
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      • 10. Lu, W., Kim, K.-H., Chang, T., Gaba, S.: ‘Two-terminal resistive switches (memristors) for memory and logic applications’. Proc. 16th Asia and South Pacific Design Automation Conf., Yokohama, Japan, January 2011, pp. 217223.
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