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Threshold-voltage-difference-based CMOS voltage reference derived from basic current bias generator with 4.3 ppm/°C temperature coefficient

Threshold-voltage-difference-based CMOS voltage reference derived from basic current bias generator with 4.3 ppm/°C temperature coefficient

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A threshold-voltage-difference-based CMOS voltage reference topology derived from the basic current bias generator is proposed. The implementation in the GSMC 0.18 μm process demonstrated that a precise voltage of 516.3 mV can be generated with a minimal temperature coefficient of 4.3 ppm/°C. The reference consumes a current of 1.9 μA with a minimum supply voltage of 1.4 V. The line regulation is 0.075%/V at room temperature. It only occupies 0.013 mm2 without any area optimisations because of its simple structure. Also, due to its special compound structure, the circuit can generate both a stable voltage and a relatively temperature-independent current.

References

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      • 4. Razavi, B.: ‘Design of analog CMOS integrated circuits’ (McGraw-Hill Science/Engineering/Math, USA, 2000, 1st edn).
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