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access icon free Reference voltage generation scheme enhancing speed and reliability for 1T1C-type FRAM

  • Author(s): Ze Jia 1 ; Gong Zhang 2 ; Jizhi Liu 1 ; Zhiwei Liu 1 ; Juin J. Liou 3
    • View affiliations
    • Affiliations: 1: School of Microelectronics and Solid-State Electronics, University of Electronic Science and Technology of China, Chengdu 610054, Sichuan, People's Republic of China;
      2: Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, People's Republic of China;
      3: Department of Electrical Engineering and Computer Science, University of Central Florida, Orlando, FL 32816, USA
  • Source: Volume 50, Issue 3, 30 January 2014, p. 154 – 156
    DOI:  10.1049/el.2013.3193 , Print ISSN 0013-5194, Online ISSN 1350-911X
© The Institution of Engineering and Technology
Received 25/09/2013, Published 17/01/2014

An improved reference voltage generation scheme is proposed for a 1T1C-type ferroelectric random access memory (FRAM), in which the circuit referring to reference cells is redefined and the data are written into reference cells at random between ‘1’ and ‘0’ depending on the voltages of the bitlines during every operation cycle. Compared with conventional schemes, it can not only realise higher access speed for memory, but also can enhance its reliability by resolving the imprint and relieving the fatigue relating to ferroelectric capacitors in the device. Functional verification for the experimental prototype utilising the proposed scheme has been implemented.

Inspec keywords: reference circuits; ferroelectric capacitors; ferroelectric storage; circuit reliability; random-access storage

Other keywords: 1T1C-type ferroelectric random access memory; ferroelectric capacitor; 1T1C-type FRAM; reliability; reference voltage generation scheme

Subjects: Reliability; Semiconductor storage; Capacitors; Power electronics, supply and supervisory circuits; Ferroelectric devices; Memory circuits

References

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