access icon free Enhanced passive equaliser using open-stub structure

An open-stub compensation technique is proposed for passive equalisers used in high-speed digital communication systems. By simply lumping an open stub to the conventional RL-type passive equaliser, the frequency-dependent channel loss from the long transmission path can be compensated, the frequency response of the channel becomes more flat and the bandwidth is wider. On comparing the proposed passive equaliser with typical RL passive equalisers, the simulation results show that the proposed technique can achieve an improvement by 1 GHz in the flat region of S 21 on a 60 cm-long differential pair. Thus, the proposed technique successfully demonstrates an improvement in electrical performance of about 57.4% in the time domain.

Inspec keywords: passive networks; equalisers; waveguide components; digital communication

Other keywords: high speed digital communication system; frequency dependent channel loss compensation; conventional RL-type passive equaliser; open stub compensation technique; open stub lumping; open stub structure; enhanced passive equaliser; size 60 cm; long differential pair; long transmission path

Subjects: Waveguide and microwave transmission line components; Passive filters and other passive networks

References

    1. 1)
      • 4. Lee, D., Han, J., Han, G., Park, S.M.: ‘10 Gbit/s 0.0065 mm2 6 mW analogue adaptive equaliser utilising negative capacitance’, Electron. Lett., 2009, 45, (17), pp. 863865 (doi: 10.1049/el.2009.1525).
    2. 2)
      • 2. Guo, W., Tsai, F.-N., Shiue, G.-H., Wu, R.-B.: ‘Reflection enhanced compensation of lossy traces for best eye-diagram improvement using high impedance mismatch’, IEEE Trans. Adv. Packag., 2008, 31, (3), pp. 619626 (doi: 10.1109/TADVP.2008.920649).
    3. 3)
      • 5. Fan, J., Ye, X., Kim, J., Alchambeault, B., Orlandi, A.: ‘Signal integrity design for high-speed digital circuits: progress and directions’, IEEE Trans. Electromagn. Compat., 2010, 52, (2), pp. 392400 (doi: 10.1109/TEMC.2010.2045381).
    4. 4)
      • 1. Rylove, S., Reynolds, S., Storaska, D., Floyed, B., Kapur, M., Zwick, T., Gowda, S., Sorna, M.: ‘10 + Gbps 90-nm CMOS serial link demo in CBGA package’, IEEE J. Solid-State Circuits, 2005, 40, (9), pp. 19871991 (doi: 10.1109/JSSC.2005.848177).
    5. 5)
      • 3. Shim, Y., Lee, W., Song, E., Cho, J., Kim, J.: ‘A compact and wide-band passive equalizer design using a stub with defected ground structure for high speed data transmission’, IEEE Microw. Wirel. Compon. Lett., 2010, 20, (5), pp. 256258 (doi: 10.1109/LMWC.2010.2045580).
    6. 6)
      • 6. Park, J., Ha, M., Li, Q.: ‘DDR memory channel design from passive stub equalizer perspectiveDesignCon, Santa Clara, CA, USA, January 2011.
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