© The Institution of Engineering and Technology
An R2R DAC using three digital input levels rather than two is proposed as well as a modified two-level structure that emulates the three-level DAC's benefits. This three-level structure provides power reductions of 79% and linearity improvements due to matching of a factor of 2 over the two-level case. Ideal implementation is also described in terms of the logic needed to code the DAC and the requirements of the additional third reference level.
References
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7. Guerber, J., Venkatram, H., Oh, T., Moon, U.: ‘Enhanced SAR ADC energy efficiency from the early reset merged capacitor switching algorithm’. IEEE Int. Symp. Circuits and Systems, Seoul, South Korea, May 2012.
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1. Johns, D., Martin, K.: ‘Analog integrated circuit design’ (John Wiley and Sons, NJ, 1997).
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4. Kennedy, M.: ‘On the robustness of R-2R ladder DACs’, IEEE Circuits Trans. Sys. I, Reg. Pprs, 2000, 47, (2), pp. 109–116 (doi: 10.1109/81.828565).
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3. O'Reilly, P., El-Khoury, C.: ‘Modern DACs and DAC buffers improve system performance, simplify design,’ Analog Dialogue, 2012, 46.
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5. Hariprasath, V., Guerber, J., Lee, S., Moon, U.: ‘Merged capacitor switching based SAR ADC with highest switching energy-efficiency’, Electron. Lett., 2010, 46, pp. 620–621 (doi: 10.1049/el.2010.0706).
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6. Guerber, J., Gande, M., Venkatram, H., Waters, A., Moon, U.: ‘A 10b ternary SAR ADC with quantization time information utilization’, IEEE J. Solid-State Circuits, 2012, 47, pp. 2604–2613 (doi: 10.1109/JSSC.2012.2211696).
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2. Schaffer, T., Warren, H., Bustamante, M., Wong, K.: ‘A 2 GHz 12-bit digital-to-analog converter for direct digital synthesis applications’. Gallium Arsenide Integrated Circuit (GaAs IC) Symp., Orlando, FL, USA, November 1996.
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D.A. Johns ,
K. Martin
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(1997)
Analog integrated circuit design.
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9)
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J. Guerber ,
M. Gande ,
H. Venkatram ,
A. Waters ,
U. Moon
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A 10b ternary SAR ADC with quantization time information utilization.
IEEE J. Solid-State Circuits
,
2604 -
2613
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10)
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V. Hariprasath ,
J. Guerber ,
S.-H. Lee ,
U.-K. Moon
.
Merged capacitor switching based SAR ADC with highest switching energy-efficiency.
Electron. Lett.
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9 ,
620 -
621
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11)
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P. O'Reilly ,
C. El-Khoury
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Modern DACs and DAC buffers improve system performance, simplify design.
Analog Dialogue
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12)
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Schaffer, T., Warren, H., Bustamante, M., Wong, K.: `A 2 GHz 12-bit digital-to-analog converter for direct digital synthesis applications', Gallium Arsenide Integrated Circuit (GaAs IC) Symp., November 1996, Orlando, FL, USA.
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13)
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M. Kennedy
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IEEE Circuits Trans. Sys. I, Reg. Pprs
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2 ,
109 -
116
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14)
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Guerber, J., Venkatram, H., Oh, T., Moon, U.: `Enhanced SAR ADC energy efficiency from the early reset merged capacitor switching algorithm', IEEE Int. Symp. Circuits and Systems, May 2012, Seoul, South Korea.
http://iet.metastore.ingenta.com/content/journals/10.1049/el.2012.4224
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content/journals/10.1049/el.2012.4224
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