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Model of hot-carrier degradation for lateral IGBT device on SOI substrate

Model of hot-carrier degradation for lateral IGBT device on SOI substrate

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A novel model for hot-carrier degradation in a lateral insulated gate bipolar transistor (IGBT) device on SOI substrate (SOI-LIGBT) is presented. The setup of the model is based on the existing hot-carrier degradation mechanism in a SOI-LIGBT and assisted by a lateral DMOS device on SOI substrate (SOI-LDMOS) with completely the same structure except for the doping type in the drain area. The model parameters have been extracted by the degradation measurement results and the validity of the proposed model in a SOI-LIGBT has been also verified.

References

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      • Qiao, M., Jiang, L., Wang, M.: `High-voltage thick layer SOI technology for PDP scan driver IC', Power Semiconductor Devices & IC's, (ISPSD), 2011, San Diego, CA, USA, p. 180–183.
    2. 2)
      • Gevinti, E., Cerati, L., Sambi, M.: `Novel 190V LIGBT-based ESD protection for 0.35 µm smart power technology realized on SOI substrate', IEEE EOS/ESD Symp., 2008, Toscan, AZ, USA, p. 211–220.
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      • Moens, P., Mertens, J., Bauwens, F.: `A comprehensive model for hot carrier degradation in LDMOS transistor', Int. Reliability Physics Symp., 2007, Phoenix, AZ, USA, p. 492–497.
    6. 6)
      • Riedlberger, E., Keller, R., Reisinger, H.: `Modeling the lifetime of a lateral DMOS transistor in repetitive clamping mode', Int. Reliability Physics Symp., 2010, Anaheim, CA, USA, p. 175–181.
http://iet.metastore.ingenta.com/content/journals/10.1049/el.2012.4036
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