access icon free True random bit generation with time-delay sampled-data feedback system

© The Institution of Engineering and Technology
Received 28/09/2012, Published

A new true random bit generator circuit which is a time-delay sampled-data feedback system is proposed. The differential equation that defines the dynamic behaviour of the circuit is implemented by analogue active and passive components with a digital block that forms the sample and hold delay line as the feedback. A D-type flip-flop chain is used on the delayed feedback line due to the feedback signal which is a binary signal. The impressive features of the circuit are the ease of its implementation and the successful statistical analysis results that show its output is random. Furthermore, the reported system is the first true random bit generator using a time-delay sampled-data feedback system.

Inspec keywords: feedback; flip-flops; statistical analysis; sampled data circuits; random number generation; differential equations; sample and hold circuits

Other keywords: differential equation; dynamic behaviour; statistical analysis; active component; feedback signal; D-type flip-flop chain; true random bit generator circuit; passive component; digital block; sample-and-hold delay line; time-delay sampled-data feedback system; binary signal; analogue component

Subjects: Logic circuits; Other analogue circuits; Other topics in statistics; Differential equations (numerical analysis); Other topics in statistics; Logic and switching circuits; Differential equations (numerical analysis)

References

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