Time domain ADC for blood glucose implant

Time domain ADC for blood glucose implant

For access to this article, please select a purchase option:

Buy article PDF
(plus tax if applicable)
Buy Knowledge Pack
10 articles for $120.00
(plus taxes if applicable)

IET members benefit from discounts to all IET publications and free access to E&T Magazine. If you are an IET member, log in to your account and the discounts will automatically be applied.

Learn more about IET membership 

Recommend Title Publication to library

You must fill out fields marked with: *

Librarian details
Your details
Why are you recommending this title?
Select reason:
Electronics Letters — Recommend this title to your library

Thank you

Your recommendation has been sent to your librarian.

An analogue-to-time and time-to-digital converter (related to an integrating ADC) optimised for the sensor interface of a pill-sized wireless micro-implant for continuous blood sugar monitoring is presented. The application requires ultra-low power consumption and aggressive miniaturisation (i.e. single ASIC integration, with only three discrete capacitors) and is characterised by an extremely low sampling rate of one sample per 5 minutes. The system power consumption is significantly reduced compared to a predecessor by choosing this faster ADC and by only powering the implant for a single conversion. Transient noise simulation data is presented that predicts 10ENOB and an energy consumption per sample of 10.2 nJ. This includes power for the major system components: the sensor, on-chip clock and bias generation, and power-up and power-down overheads when taking but a single sample.


    1. 1)
      • E. Johannessen , O. Krushinitskaya . Towards an injectable continuous osmotic glucose sensor. Diabetes Sci. Technol. , 4 , 882 - 892
    2. 2)
      • Häfliger, P., Johannessen, E.: `Analog to interval encoder with active use of gate leakage for an implanted blood-sugar sensor', Proc. IEEE Biomedical Circuits and Systems Conf., 2008, Baltimore, MD, USA, p. 169–172.
    3. 3)
      • Häfliger, P.: `Live demonstration: inductive power and telemetry for a micro-implant', Proc. IEEE Int. Symp. on Circuits and Systems, (ISCAS), Paris, France, 2010.
    4. 4)
      • J. Baker . (2005) CMOS circuit design, layout and simulation.
    5. 5)
      • Enz, C.C., Temes, G.C.: `Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization’', Proc. IEEE, 1996, 84, p. 1584–1614.
    6. 6)
    7. 7)
      • van Elzakker, M., van Tuijl, E., Geraedts, P., Schinkel, D., Klumperink, E., Nauta, B.: `A 1.9 µW 4.4fJ/conversion-step 10b 1ms/s chargere-distribution ADC', Proc. of IEEE Solid-State Circuits Conf., (ISSCC), February 2008, Grenoble, France, p. 244–245.

Related content

This is a required field
Please enter a valid email address