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Way-tracking set-associative caches

Way-tracking set-associative caches

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A method for reducing the power consumption of set-associative caches is proposed. The method tracks the way information of all cache blocks and allows access of only those ways that potentially contain the requested block. When used for a 512KB eight-way 64B-block L2 cache, the method reduces the energy consumption by 79%.

References

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      • Inoue, K., Ishihara, T., Murakami, K.: `Way-predicting set-associative cache for high performance and low energy consumption', Proc. ISLPED, 1999, San Diego, CA, USA, p. 273–275.
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      • Hasegawa, A.: `SH3: high code density, low power', Proc. MICRO, 1995, Ann Arbor, MI, USA, p. 11–19.
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      • Burger, D., Austin, T.: `The SimpleScalar tool set, Version 2.0’. University of Wisconsin-Madison Computer Science', 1342, Tech. Rep., June 1997.
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      • Shivakumar, P., Jouppi, N.P.: `CACTI 3.0: an integrated cache timing, power, and area model', 2001/2, WRL Research Rep., August 2001.
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