Phase-locked loop based delta-sigma ADC

Phase-locked loop based delta-sigma ADC

For access to this article, please select a purchase option:

Buy article PDF
(plus tax if applicable)
Buy Knowledge Pack
10 articles for $120.00
(plus taxes if applicable)

IET members benefit from discounts to all IET publications and free access to E&T Magazine. If you are an IET member, log in to your account and the discounts will automatically be applied.

Learn more about IET membership 

Recommend Title Publication to library

You must fill out fields marked with: *

Librarian details
Your details
Why are you recommending this title?
Select reason:
Electronics Letters — Recommend this title to your library

Thank you

Your recommendation has been sent to your librarian.

A phase-locked loop (PLL) based delta-sigma analogue-to-digital converter architecture providing second-order noise shaping is presented. By combining a low power passive integrator with a voltage-controlled oscillator-based integrator, the proposed architecture suppresses the oscillator nonlinearity with minimum hardware penalty. Simulation results indicate 14-bit performance by using only a 4-bit linear oscillator.


    1. 1)
      • M. Hovin , A. Olsen , T. Lande , C. Toumazou . Delta-sigma modulators using frequency-modulated intermediate values. IEEE J. Solid-State Circuits , 1 , 13 - 22
    2. 2)
      • M. Straayer , M. Perrott . A 12-Bit, 10-MHz bandwidth, continuous-time ΣΔ ADC with a 5-Bit, 950-MS/s VCO-based quantizer. IEEE J. Solid-State Circuits , 4 , 805 - 814
    3. 3)
      • Park, M., Perrott, M.: `A 0.13 µm CMOS 78 dB SNDR 87 mW 20 MHz BW CT ΔΣ ADC with VCO-based integrator and quantizer', IEEE Int. Solid-State Circuits Conf.-Digest of Technical Papers, 2009. ISSCC 2009., February 2009, San Francisco, CA, USA, p. 170–171,171a.
    4. 4)
      • A. Niknejad .
    5. 5)
      • P. Hanumolu , M. Brownlee , K. Mayaram , U.-K. Moon . Analysis of charge-pump phase-locked loops. IEEE Trans. Circuits Syst I: Regular Papers , 9 , 1665 - 1674
    6. 6)
      • J. Kim , T.-K. Jang , Y.-G. Yoon , S. Cho . Analysis and design of voltage-controlled oscillator-based analog-to-digital converter. IEEE Trans. Circuits and Syst. I: Regular Papers , 1 , 18 - 30

Related content

This is a required field
Please enter a valid email address