Switched-capacitor cyclic DAC with mismatch charge compensation

Switched-capacitor cyclic DAC with mismatch charge compensation

For access to this article, please select a purchase option:

Buy article PDF
(plus tax if applicable)
Buy Knowledge Pack
10 articles for $120.00
(plus taxes if applicable)

IET members benefit from discounts to all IET publications and free access to E&T Magazine. If you are an IET member, log in to your account and the discounts will automatically be applied.

Learn more about IET membership 

Recommend Title Publication to library

You must fill out fields marked with: *

Librarian details
Your details
Why are you recommending this title?
Select reason:
Electronics Letters — Recommend this title to your library

Thank you

Your recommendation has been sent to your librarian.

A switch-capacitor cyclic DAC with mismatch charge compensation scheme is proposed. With this approach, the DAC error caused by capacitor mismatches can be effectively reduced, which alleviates the matching requirement. The operation of the proposed DAC is verified through circuit level simulations.


    1. 1)
    2. 2)
      • C. Lu , L. Huang . A 10 bit LCD column driver with piecewise linear digital-to-analog converter. IEEE J. Solid-State Circuits , 2 , 371 - 378
    3. 3)
      • P. Rombouts , L. Weyten . Linearity improvement for the switched capacitor DAC. Electron. Lett. , 4 , 293 - 294
    4. 4)
      • Choi, Y.K.: `A compact low-power CDAC architecture for mobile TFT-LCD driver ICs', IEEE ISSCC, 2008, San Francisco, CA, USA, p. 176–177.
    5. 5)
      • P. Chen , T.C. Liu . Switching schemes for reducing capacitor mismatch sensitivity of quasi-passive cyclic DAC. IEEE Trans. Circuits Syst. II , 1 , 26 - 30

Related content

This is a required field
Please enter a valid email address