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An essential modification to a conventional four-stage pseudo class AB amplifier results in a true class AB amplifier. As opposed to the conventional pseudo class AB scheme, which uses a current mirror in the third stage, this work uses an adaptive biasing circuit in the third stage to drastically reduce quiescent current. The pseudo class AB and new class AB amplifiers are designed in a 0.5 µm process with power supplies of ±1.5 V for a phase margin of 67° while driving a load of 32 Ω ‖ 500 pF. At a maximum negative load current of −12.5 mA, simulations show that both amplifiers consume 43.9 µA of quiescent current. However, at a maximum positive load current of +12.5 mA, the pseudo class AB consumes 1.22 mA of quiescent current, while the new class AB amplifier consumes only 140 µA: a reduction in quiescent current by more than a factor of eight at maximum positive load.
References
-
-
1)
-
A.S. Sedra ,
K.C. Smith
.
(1998)
Microelectronic circuits.
-
2)
-
Y.-H. Lin ,
K.-L. Zheng ,
K.-H. Chen
.
Smooth pole tracking technique by power MOSFET array in low-dropout regulators.
IEEE Trans. Power Electron.
,
5 ,
2421 -
2427
-
3)
-
Wong, K., Evans, D.: `A 150 mA low noise, high PSRR low-dropout linear regulator in 0.13 µm technology for RF SoC applications', Proc. European Solid-State Circuits Conf, 2006, San Francisco, CA, USA, p. 532–535.
-
4)
-
Zhu, F., Yan, S., Hu, J., Sanchez-Sinencio, E.: `Feedforward reversed nested Miller compensation techniques for three-stage amplifiers', Proc. IEEE Int. Symp. on Circuits and Systems, 2005, Koba, Japan, 3, p. 2575–2578.
-
5)
-
A.J. Lopez-Martin ,
S. Baswa ,
J. Ramirez-Angulo ,
R.G. Carvajal
.
Low-voltage super class AB CMOS OTA cells with very high slew rate and power efficiency.
IEEE J. Solid-State Circuits
,
5 ,
1068 -
1077
-
6)
-
R. Mita ,
G. Palumbo ,
S. Pennisi
.
Design guidelines for reversed nested Miller compensation in three-stage amplifiers.
IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process.
,
5 ,
227 -
233
-
7)
-
A. Garimella ,
M.W. Rashid ,
P.M. Furth
.
Reverse nested Miller compensation using current buffers in a three-stage LDO.
IEEE Trans. Circuits and Systems II: Express Briefs
,
4 ,
250 -
254
-
8)
-
R. Widlar
.
Some circuit design techniques for linear integrated circuits.
IEEE Trans. Circuit Theory
,
4 ,
586 -
590
-
9)
-
R.G.H. Eschauzier ,
R. Hogervorst ,
J.H. Huijsing
.
A programmable 1.5 V CMOS class-AB operational amplifier with hybrid nested Miller compensation for 120 dB gain and 6 MHz UGF.
IEEE J. Solid-State Circuits
,
12 ,
1497 -
1504
-
10)
-
A.D. Grasso ,
G. Palumbo ,
S. Pennisi
.
Advances in reverse nested Miller compensation.
IEEE Trans. Circuits Syst. I
,
7 ,
1459 -
1470
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