Improved architecture for low-distortion ΔΣ ADCs

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Improved architecture for low-distortion ΔΣ ADCs

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The low-distortion modulator is an effective ΔΣ ADC architecture for high-linearity and low-dissipation applications. However, it has several practical drawbacks. An improved low-distortion modulator topology that avoids these disadvantages is suggested.

Inspec keywords: transfer functions; analogue-digital conversion; integrating circuits; modulators; delta-sigma modulation

Other keywords: multibit DAC; unity signal transfer function; low-distortion modulator topology; dynamic element matching; low-distortion ΔΣ ADC architecture; delaying integrators; DEM timing

Subjects: General circuit analysis and synthesis methods; Modulators, demodulators, discriminators and mixers; Other analogue circuits; A/D and D/A convertors

References

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      • K. Lee , J. Chae , G.C. Temes . Efficient floating double-sampling integrator for ΔΣ ADCs. Electron. Lett. , 25 , 1413 - 1414
    2. 2)
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    4. 4)
      • A.A. Hamoui , K.W. Martin . High-order multibit modulators and pseudo data-weighted-averaging in low-oversampling ΔΣ ADCs for broad-band applications. IEEE Trans. Circuits Syst. I, Reg. Papers , 1 , 72 - 85
    5. 5)
http://iet.metastore.ingenta.com/content/journals/10.1049/el.2009.0537
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