© The Institution of Engineering and Technology
A novel 16-level current-mode DRAM based on the continuous valued number system (CVNS) representation is introduced. The refreshing circuitry of this DRAM is designed using analogue to digital converter (ADC) and digital to analogue converter modules. Each ADC generates two bits of the output simultaneously which decreases the delay time of the ADC module. Error correction codes are used to increase the noise margin by a factor of two. The proposed memory can be used in hardware implementation of CVNS based systems.
References
-
-
1)
-
A. Saed ,
M. Ahmadi ,
G.A. Jullien
.
A number system with continuous valued digits and modulo arithmetic.
IEEE Trans. Comput.
,
11 ,
1294 -
1304
-
2)
-
Liu, B., Frenzel, J.F., Wells, R.B.: `A multi-level DRAM with fast read and low power consumption', Microelectronics and Electron Devices, April 2005, Idaho, USA, p. 59–62.
-
3)
-
Lee, E.K.F., Gulak, P.G.: `Dynamic current-mode multi-valued MOS memory with error correction', Proc. 22nd Int. Symp. on Multiple-Valued Logic, 1992, Sendai, Japan, p. 208–215.
-
4)
-
Mirhassani, M., Ahmadi, M., Jullien, G.A.: `Digital multiplication using continuous valued digits', IEEE Int. Symp. on Circuits and Systems, 2007, New Orleans, USA, p. 3263–3266.
-
5)
-
Birk, G., Elliott, D.G., Cockburn, B.F.: `A comparative simulation study of four multilevel DRAMs', Memory Technology, Design and Testing, August 1999, California, USA, p. 102–109.
-
6)
-
Matolin, D., Schreiter, J., Getzlaff, S., Schuffny, R.: `An analog VLSI pulsed neural network implementation for image segmentation', Int. Conf. on Parallel Computing in Electrical Engineering, September 2004, Dresden, Germany, p. 51–55.
-
7)
-
G. Wegmann ,
E.A. Vittoz
.
Basic principles of accurate dynamic current mirrors.
IEE Proc., Circuits, Devices Syst.
,
2 ,
95 -
100
-
8)
-
Nairn, D.G., Salama, C.A.T.: `A current mode algorithmic analog-to-digital converter', IEEE Int. Symp. on Circuits and Systems, June 1988, Espoo, Finland, 3, p. 2573–2576.
-
9)
-
Tipsuwanporn, V., Numsomran, A., Chuchotsakunleot, W., Chuenarom, S., Maitreechit, S.: `Algorithmic ADC using current mode without DAC', Asia-Pacific Conf. on Circuits and Systems, October 2002, 1, p. 453–456.
http://iet.metastore.ingenta.com/content/journals/10.1049/el.2009.0063
Related content
content/journals/10.1049/el.2009.0063
pub_keyword,iet_inspecKeyword,pub_concept
6
6