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16-level CVNS memory with fast ADC

16-level CVNS memory with fast ADC

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A novel 16-level current-mode DRAM based on the continuous valued number system (CVNS) representation is introduced. The refreshing circuitry of this DRAM is designed using analogue to digital converter (ADC) and digital to analogue converter modules. Each ADC generates two bits of the output simultaneously which decreases the delay time of the ADC module. Error correction codes are used to increase the noise margin by a factor of two. The proposed memory can be used in hardware implementation of CVNS based systems.

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