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2010 Forum on Specification & Design Languages (FDL 2010)

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  • Location: Southampton, UK
  • Conference date: 14-16 Sept. 2010
  • ISBN: 978 2 95305 043 1
  • Conference number: 2010/002
  • The following topics are dealt with: formal verification; debugging; performance optimisation; power optimisation; robustness; formal models; SystemC models; mixed-technology system design; SoC synthesis; model driven approaches; and time modelling.

1 - 20 of 52 items found

  • Modeling time-triggered architecture based safety-critical embedded systems using SystemC
  • SystemC-A modelling of mixed-technology systems with distributed behaviour
  • Mixed signal simulation with SystemC and Saber
  • HetMoC: heterogeneous modelling in SystemC
  • LBSD3: Efficient Analysis and Simulation of SystemC Models
  • A theoretical and experimental review of SystemC front-ends
  • A dynamic load balancing method for parallel simulation of accuracy adaptive TLMs
  • Modeling technique for simulation time speed-up of performance computation in transaction level models
  • SystemC architectural transaction level modelling for large NoCs
  • EAMS2: Analog and Mixed-Technology System Design
  • Bottom-up verification methodology for CMOS photonic linear heterogeneous system
  • VHDL-AMS model of RF-interconnect system for global on-chip communication
  • Towards abstract analysis techniques for range based system simulations
  • A solution to the lack of multiple inheritance in SystemVerilog
  • Genetic-based high-level synthesis of ΣΔ modulator in SystemC-A
  • LBSD4: Synthesis for SoC and Beyond
  • Synthesis of glue logic, transactors, multiplexors and serialisors from protocol specifications
  • Exercises in architecture specification using CλaSH
  • SyReC: a programming language for synthesis of reversible circuits
  • UMES1: Model Driven Approaches for the Development of Embedded Systems
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