Reed-Solomon decoders for the read-write channel
Reed-Solomon decoders for the read-write channel
- Author(s): E.M. Popovici ; P. Fitzpatrick ; C.C. Murphy
- DOI: 10.1049/ic:19980663
For access to this article, please select a purchase option:
Buy conference paper PDF
Buy Knowledge Pack
IET members benefit from discounts to all IET publications and free access to E&T Magazine. If you are an IET member, log in to your account and the discounts will automatically be applied.
IEE Colloquium on Systems on a Chip — Recommend this title to your library
Thank you
Your recommendation has been sent to your librarian.
- Author(s): E.M. Popovici ; P. Fitzpatrick ; C.C. Murphy Source: IEE Colloquium on Systems on a Chip, 1998 page ()
- Conference: IEE Colloquium on Systems on a Chip
Presents a hardware implementation of the Fitzpatrick algorithm (denoted by F) for solving the key equation in Reed-Solomon decoding. In addition, comparisons with the Berlekamp Massey (denoted by BM) algorithm in terms of area (FPGA resources) and speed are made. It is shown that use of the division free F algorithm results in both area and speed improvements in PRML systems. (5 pages)
Inspec keywords: partial response channels; Reed-Solomon codes; disc drives; maximum likelihood detection; field programmable gate arrays
Subjects: Magnetic recording; Codes; Storage on moving magnetic media; Logic circuits; Logic and switching circuits
Related content
content/conferences/10.1049/ic_19980663
pub_keyword,iet_inspecKeyword,pub_concept
6
6