Carrier lifetime control: processes and modelling
Carrier lifetime control: processes and modelling
- Author(s): P.C. Johnson ; J. Asher ; D.C. Chivers ; D.J.S. Findlay ; A. Harker
- DOI: 10.1049/ic:19960861
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- Author(s): P.C. Johnson ; J. Asher ; D.C. Chivers ; D.J.S. Findlay ; A. Harker Source: IEE Colloquium on New Developments in Power Semiconductor Devices, 1996 page ()
- Conference: IEE Colloquium on New Developments in Power Semiconductor Devices
Currently, design software for power semiconductor devices can only represent carrier lifetime control in the crudest of ways, and there is a growing need for better design tools to enable easier process selection, more tightly focused test matrices and a reduction in developments costs for new products. In this paper we discuss new-generation doping and irradiation technologies and possible modelling approaches aimed at improving the design process. (3 pages)
Inspec keywords: semiconductor process modelling; power semiconductor devices; radiation effects; carrier lifetime; semiconductor doping
Subjects: Semiconductor device modelling, equivalent circuits, design and testing; Semiconductor doping
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