Increasing requirements for radar system performance have led to the need for improvements in signal processing computational capacity. Coupled with the need for flexibility and adaptability of programmable solutions this has led to the development of parallel DSP architectures. Such solutions offer potential benefits for fault tolerant and scalable systems. Marconi Radar Systems has implemented massively parallel signal processing architectures based on the Inmos Transputer and Texas Instruments TMS320C40 devices. The characteristics of each device differ in ways which offer advantages for certain architectural configurations and applications. Examples are given from practical experience. Issues such as processing bandwidth, CPU architecture, communications bandwidth and topology, multi-processor support and development environment are considered. Future trends in algorithms and architectures are discussed. The coupling between these two design factors is seen to depend on the development of an automated parallel DSP design environment. (7 pages)