A high sensitivity CMOS photoreceiver incorporating a high multiplication gain avalanche photodiode
A high sensitivity CMOS photoreceiver incorporating a high multiplication gain avalanche photodiode
- Author(s): A. Moloney and A. Morrison
- DOI: 10.1049/cp:20040539
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- Author(s): A. Moloney and A. Morrison Source: Irish Signals and Systems Conference 2004, 2004 p. 179 – 185
- Conference: Irish Signals and Systems Conference 2004
- DOI: 10.1049/cp:20040539
- ISBN: 0 86341 440 0
- Location: Belfast, Ireland
- Conference date: 30 June-2 July 2004
- Format: PDF
A photoreceiver consisting of a monolithically integrated avalanche photodiode and a CMOS transimpedance amplifier is presented. The sensitivity has been analysed theoretically through simulations and a detailed noise analysis. Sensitivity results are presented based on the OEIC being fabricated in a 1.5 μm CMOS process. At 2 Gb/s, the receiver has sensitivities of -33.5 dBm and -34.7 dBm for 650 nm and 850 nm light respectively, which exceed the performance of other reported CMOS photoreceivers.
Inspec keywords: sensitivity; integrated optoelectronics; optical receivers; avalanche photodiodes; monolithic integrated circuits; CMOS analogue integrated circuits; circuit simulation; amplifiers
Subjects: Semiconductor integrated circuit design, layout, modelling and testing; Integrated optoelectronics; Amplifiers; CMOS integrated circuits; Computer-aided circuit analysis and design
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