This paper describes an application specific vector processor for TLM. The core is based on an open-source microprocessor with a custom vector coprocessor. In architectural simulation the vector unit is able to achieve a speedup of 10 times compared with an ordinary scalar processor when tested on a mesh of one million nodes with a vector length of 16. The vision for this design is to apply multiple vector cores in the form of a shared-memory vector multiprocessor, and thus improve the performance even further.