Cache-optimized implementation of long sequences FFT on TS201
Cache-optimized implementation of long sequences FFT on TS201
- Author(s): Gao Lining ; Ma Xiao ; Yuan Yuan ; Pang Fengqian
- DOI: 10.1049/cp.2013.0378
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- Author(s): Gao Lining ; Ma Xiao ; Yuan Yuan ; Pang Fengqian Source: IET International Radar Conference 2013, 2013 page ()
- Conference: IET International Radar Conference 2013
- DOI: 10.1049/cp.2013.0378
- ISBN: 978-1-84919-603-1
- Location: Xi'an, China
- Conference date: 14-16 April 2013
- Format: PDF
This paper proposes an improved method for Winograd algorithm, aiming to solve the problem that the existing methods of long sequences Fast Fourier Transform (FFT) on the TS201 processor doesn't take full account of the Cache's miss influence on efficiency. The new method makes maximum use of the Cache's advantages in reading and writing by optimizing the access method of rows and columns to avoid three explicitly matrix transposition, and hiding the twiddle factor multiplication by reconfiguration butterfly computation. Test results show that the performance of Cache-Optimized Implementation of FFT has been significantly improved. (5 pages)
Inspec keywords: circuit optimisation; DRAM chips; fast Fourier transforms; cache storage
Subjects: Memory circuits; Semiconductor storage; Integral transforms; Integral transforms
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