A high speed turbo decoder implementation for CPU-based SDR system
A high speed turbo decoder implementation for CPU-based SDR system
- Author(s): Lin Huang ; Yajuan Luo ; Hao Wang ; Feng Yang ; Zhenning Shi ; Daqing Gu
- DOI: 10.1049/cp.2011.0622
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- Author(s): Lin Huang ; Yajuan Luo ; Hao Wang ; Feng Yang ; Zhenning Shi ; Daqing Gu Source: IET International Conference on Communication Technology and Application (ICCTA 2011), 2011 p. 19 – 23
- Conference: IET International Conference on Communication Technology and Application (ICCTA 2011)
- DOI: 10.1049/cp.2011.0622
- ISBN: 978-1-84919-470-9
- Location: Beijing, China
- Conference date: 14-16 Oct. 2011
- Format: PDF
More and more CPU-based SDR systems appear in recent two years. Such system requires high speed real-time signal processing. In this paper, we present our effort on the speed optimization of Turbo decoder, the most computation-demanding module in all baseband modules. We jointly consider the algorithm parallelism and the processor architecture. Single Instruction Multiple Data (SIMD) instruction is used for software implementation. The evaluation results show that this proposed design can achieve a maximum of 124 Mbps throughput for single Soft Input Soft Output (SISO) module with Max-Log-MAP algorithm.
Inspec keywords: maximum likelihood estimation; MIMO communication; software radio; turbo codes; telecommunication computing; signal processing
Subjects: Other topics in statistics; Signal processing and detection; Radio links and equipment; Communications computing; Digital signal processing; Other topics in statistics
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