The earlier chapters provide an introduction to silicon IC technology and include descriptions of the various processing techniques employed in the manufacture of microelectronic components. A heavy emphasis is placed on the design of semi-custom IC's consideration is also given to the ways in which custom VLSI circuits will be designed in future.
Inspec keywords: read-only storage; VLSI; bipolar integrated circuits; integrated circuit design; electronic design automation; programmable logic arrays
Other keywords: CAD; MOS technologies; ROM; semi-custom IC design; design automation; programmable logic array; VLSI; bipolar technologies; silicon fabrication
Subjects: Electronic engineering computing; Computer-aided circuit analysis and design; Logic circuits; Other MOS integrated circuits; Logic and switching circuits; Bipolar integrated circuits; Semiconductor integrated circuit design, layout, modelling and testing; Memory circuits; Semiconductor storage
This chapter discusses various techniques for semi-custom IC design and VLSI. The most common of these techniques have been classified under the generic headings of gate arrays on the one hand and standard cells on the other. There are some other techniques that are commonly grouped under the heading of semi-custom ICs, including Programmable Logic Arrays (PLA), Programmable Read Only Memories (PROM) and Programmable Array Logic (PAL).
The following sections are included: introduction; basic material; lithography; oxidation; epitaxial growth; doping; metallisation; etching; manufacturing process; design rules; and new techniques.
The rate of technological change in electronics has been quite extraordinary over the past twenty years and while there is little sign that new developments will cease in the foreseeable future, some semblance of order or even stability is beginning to appear, at least in the field of silicon integrated circuits, where the technology is reaching maturity. Other devices such as those based on gallium arsenide (GaAs) are only at the start of their evolution in everyday commercial use and no doubt we will experience a hectic period of development while that technology matures. The same is true of the more abstruse technologies such as those using macroscopic quantum effects, the so-called Josephson Junctions, which are a most interesting, if rather specialised, area of development. In this chapter the focus will be on the mainstream technologies based on silicon which, to date, constitutes, for all practical purposes, the only available material for the construction of large or very large scale integrated (VLSI) circuits.
The aim of this chapter has been to review the various different types of semi-custom IC that are available. As such it sets the scene for the later material which deals with the steps involved and the tools used in designing with these devices. The layout styles of gate arrays and standard cell ICs means that they are currently well-suited to 'mopping-up' chunks of random logic that might otherwise require 20 to 30 standard off-the-shelf SSI/MSI ICs. They do not perform well, however, in situations demanding substantial amounts of on-chip memory (e.g. RAM, ROM) or regularly-structured logic such as PLAs. Their ability to cope adequately with bus-oriented logic is also somewhat limited. Since these are all characteristic features of VLSI chips it is reason able to assume that further evolution of the structure andorganisation of semi-custom ICs will occur in future.
The choice of semi-custom technique, supplier and design route will depend on the customer and his particular requirements. Every situation is different and this chapter seeks only to give guidance and to point out some of the strengths and weaknesses of various approaches. Three main criteria must always be satisfied: (a) The final device must meet all technical requirements (functionality, reliability etc). (b) The total cost of obtaining the devices must make the end product economically viable. (c) The timescales to obtain the devices must be acceptable in respect of the production of the end product. For the purposes of this chapter, semi-custom techniques will be divided into three broad classifications, Programmable Devices, Gate Arrays and Cell-Based Systems.
This chapter examines Gate Array and Standard Cell semi custom design techniques and their interaction with circuit design at the transistor level. Circuit techniques available to the full custom designer are presented and the constraints which are applied in the production of semi-custom designs are discussed.
This chapter has described how a more formal approach to logic design can be adopted that uses an algorithm of a solution as a basis for designing a hardware logic system. The method partitions the design into data part and control part and the chapter shows the relationship between these parts and the algorithm. The data part implements assignment and relational statements, while the control part activates the former and responds to the latter in the correct sequence. Optimisation was shown to form an integral part of this process. An ASM chart is produced to describe the controller and this chart forms the basis of the implementation decisions that follow. The method can be manual but is also suited to computer aided processes especially if some constraints are imposed on the implementation.
There are a number of methods for implementation of a semi-custom design as an integrated circuit, but the main thrust of most methods is to choose a target structure on the silicon which is both flexible in use and permits a simple, correct compilation process from the description of the required behaviour to the mask layout. Programmable Logic Arrays substitute an overall floor plan, or architectural arrangement of the gates for the fixed array of primitives; the structure is therefore simple to connect because the signal flow is predefined by the architecture, and can be more efficient in silicon area because only the area actually required for the function is used rather than a fixed size of chip. The disadvantage of the PLA is that its fixed architecture narrows the range of applicability more than other semi-custom techniques.
It is informative to see that there is a continuous spectrum of implementation choices from the simple combinatorial logic circuit to a fully-fledged microprogrammed machine all being derived from the same design philosophy based on an algorithmic description of the solution. It is not difficult to see that programs running on computers are an upward extension of the same theme. Here hardware implementations have been concentrated on and a wide range of options have been illustrated. The arrival of semi-custom and VLSI design methods has extended the options even further. As well as being a well organised method it provides a standard approach that all designers can adopt thereby making designs more understandable. The method provides a good documentation base which also improves the portability of the designs. ASM is not a replacement for the more sophisticated methods of design being produced for VLSI systems, but it does provide a workable method which may suffice until these tools are available.
The following sections are included: introduction; benefits of CAD; CAD for semicustom IC; placement; tracking or routing; test generation; input and CAE workstations; verification and simulation; timing verification; cells and specifications; and conclusion.
It has not been possible in the space available to give a detailed account of the whole topic of simulation. The aim instead has been to illustrate the various levels at which simulation can be carried out and to highlight the major areas of interest to the designers of semi-custom integrated circuits. Simulators which are currently available provide the required results, but there is still a need to develop better user interfaces. By this is meant the format of specification of the design for input, and the way in which results are displayed. Of particular importance with regard to the input specification is its compatibility with previous stages in the design process, since the aim must now be not simply to produce a design tool which operates in isolation but which is part of an integrated design system. This design system would take as its input a high-level specification of the system and then all the remaining stages take place with the minimum of designer interaction.
An essential part of any Design Automation System for semi-custom i.e. design is the auto layout software whose task it is to translate the structural information provided by the designer, usually in terms of a textual representation of a logic diagram, into mask descriptions. For both economic and technical reasons it is desirable to reduce the number of chips used in a system to a minimum with the eventual aim of implementing the whole system on one VLSI chip. In general, however, this is not possible and the designer is left with the necessity of partitioning the system over a number of chips. After this task has been performed, each subsystem must again be decomposed into an interconnected network of smaller units, and so on until a level of primitives is reached which will be mapped directly onto the silicon.
Testing of circuits with a few hundred logic functions can, in general be performed by the use of selected logic stimuli (Mueldorf and Savkav (1)). Exhaustive testing of circuits demands that all possible logic states in which a circuit can exist must be considered. Automatic test pattern generation (ATPG) methods (Williams and Parker (2), Papaionnou (3), Schnurmann et al (4)) can be used to effect in determining the test stimuli (or test vectors) required to achieve or approximate such an exhaustive test. For combinational circuits where the present states of the output variables are a function only of the present states of the input variables, exhaustive testing requires derivation of a test sequence to create all of the possible input combinations and check the outputs for correct responses. These input stimuli can be applied from automatic test equipment systems (ATE) and the responses can subsequently be sensed by the same equipment.
The structured approach to tackling complex systems is well recognised as desirable, if not essential, for the ultimate development of a successful design. The top of the pyramid contains the highest level of system description and the design process involves successively splitting this task into independent operations on ever-lower levels. At the bottom of the pyramid are found myriad independent layout, simulation and checking tasks at the lowest cell level. The process of implementation involves executing these small, manageable tasks and then combining their results via rules of composition to progress back up the pyramid and so realise the entire system.
This chapter is intended to augment the formal information on the subject of semi-custom design by giving a flavour of practical experience in this area. In discussing system design (section 15.2), some of the choices and constraints involved are presented and their influence is illustrated with real design examples. It is shown that a solution may be approached directly if the constraints are not severe, but in most practical situations it will be arrived at by a process of iteration where the choices are examined in an interactive way and the designer moves in all directions through the design space.
