In a typical consumer electronics generation, diverse forms of attacks exist, e.g., system security, information security, information privacy, system trustworthiness, hardware IP protection, information copyright protection. Each of the attacks have their own threats and serve different purposes. The objective of this chapter is to differentiate each of these attacks in the context of internet of things (IoT). IoT is a very hot, trending topic of research, where different devices, sensors, and computers are connected to a network, collect data, and process for different purposes. A network of devices and sensors connected to the cloud can complete many unimaginable tasks, and without the existence of cloud, almost all task would have been very difficult to achieve and complete. Since, most connectivity occurs in cloud, there is always a probability of security and privacy threats. Because all types of the different devices are connected to the internet, attackers pose a huge threat to the system. For example, if any electronic system that is responsible for home care, healthcare, running an entire city, etc., are attacked, then the consequence of this threat will be a major catastrophe.

This chapter discusses robust watermarking approaches for the ownership protection of hardware cores [a.k.a. intellectual property (IP) cores]. Watermarking ensures some additional attributes inserted in the hardware core such a way that it can be used to verify ownership of the hardware core when required. Robust watermarking approaches have been discussed as these are resilient to various attacks that happen in global supply chain for various reasons.

The article focuses on a technique called computational forensic engineering (CFE) for ownership protection. FE extracts the features of DSP IP cores and matches to statistically suggest the original ownership. It also discusses various steps involved in CFE hard IP core and presents specific details with case study examples.

The previous chapter detailed many approaches for structural obfuscation but we now move forward to another class of obfuscation called “functional obfuscation.”The use of either of the techniques is the choice of design engineers. This chapter presents several methods to thwart IP piracy and RE attacks through functional obfuscation. More specifically, we will discuss IP functional locking blocks (ILBs)-based logic obfuscation for DSP cores used in CE devices as hardware hardening technique (Sengupta et al., 2018). Moreover, a PSO-based DSE is performed to generate a low-overhead, functionally obfuscated (FO) design solution for DSP cores (Sengupta and Sedaghat, 2011, 2013). The rest of the chapter is organized as follows: Section 8.2 discusses different attack scenarios and threat model. Section 8.3 explains selected functional obfuscation techniques that are available in the literature. Section 8.4 discusses the design process of functional obfuscation for DSP IP cores used in CE devices. Section 8.5 presents the security analysis of functional obfuscation methodology for DSP IP core design. Section 8.6 discusses PSO-based optimization for FO design. Section 8.7 presents analysis on case studies/test cases.

In this era of consumer electronics, cyber security is one of the key challenges. Any security, privacy, or protection methods that are deployed rely on cryptography. Advance encryption standard (AES) is one of the heavily used cryptography algorithms for its advantages. This chapter is dedicated to the process of AES and its hardware design in the form of IP core. Several hardware security techniques rely on AES IP core as an important block. Additionally, since this is such an important core, its self-protection against forgery/piracy is also crucial. Thus, this chapter will also discuss about AES IP core protection using watermarking.

It has been the practice to store information under lock and key for safeguarding it. Even today, we use cryptographic primitives to store information securely under lock and key, encryption, and decryption. For the process of cryptography, keys are necessary for any operation. But these keys should be stored in the memory so that they can be used whenever necessary. When a key is stored in the memory, it can be stolen by the adversary using various methods. Therefore, storing it in a nonvolatile memory is not an option in this age of security threats. Physical unclonable functions (PUFs) are the promising security primitives used for generating the keys instead of storing them in the memory. These modules use the naturally occurring manufacturing variations in the fabrication process for generating the keys for cryptographic purposes. This chapter discusses different types of PUFs. Section 12.1 gives a brief introduction of PUFs. Section 12.2 discusses working principles of PUFs. Section 12.3 discusses different characteristics of a PUF design. Section 12.4 presents different classifications of PUFs. Various designs of PUF based on ring oscillators (ROs) are presented in Section 12.5, based on multiplexers and reconfigurability are presented in Section 12.6. Static random access memory (SRAM)-based PUFs are presented in Section 12.7, memristor-based PUFs are presented in Section 12.8, and diode-based PUFs are presented in Section 12.9. There are also non-silicon-based PUF designs, such as carbon PUFs, presented in Section 12.10. Microprocessors can also be used for implementing the PUF designs which are presented in Section 12.11. Magnetic material-based PUFs are presented in Section 12.12 and the FPGA implementations of PUF and security measures for FPGA are presented in Section 12.13. Some case study applications are presented in Section 12.14. Further the issues and challenges faced during the design of PUF modules are presented in Section 12.15. The conclusion and future directions are presented in Section 12.16.

The Appendix considers transfer functions and the control data flow graph of DSP cores including: four-point DCT; four-point DIT-FFT; four-point IDCT; eight-point DIT-FFT; eight-point IDCT; third-order FIR filter and third-order IIR filter.