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Nano-CMOS and Post-CMOS Electronics: Circuits and Design

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Editors: Saraju Mohanty 1 ; Ashok Srivastava 2
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Publication Year: 2016

The demand for ever smaller and portable electronic devices has driven metal oxide semiconductor-based (CMOS) technology to its physical limit with the smallest possible feature sizes. This presents various size-related problems such as high power leakage, low-reliability, and thermal effects, and is a limit on further miniaturization. To enable even smaller electronics, various nanodevices including carbon nanotube transistors, graphene transistors, tunnel transistors and memristors (collectively called post-CMOSdevices) are emerging that could replace the traditional and ubiquitous silicon transistor. This book explores these nanoelectronics at the circuit and systems levels including modelling and design approaches and issues. Topics covered include self-healing analog and radio frequency circuits; on-chip gate delay variability measurement in scaled technology node; nanoscale finFET devices for PVT aware SRAM; data stability and write ability enhancement techniques for finFET SRAM circuits; low-leakage techniques for nanoscale CMOS circuits; thermal effects in carbon nanotube VLSI interconnects; lumped electro-thermal modeling and analysis of carbon nanotube interconnects; high-level synthesis of digital integrated circuits in the nanoscale mobile electronics era; SPICEless RTL design optimization of nanoelectronic digital integrated circuits; green on-chip inductors for threedimensional integrated circuits; 3D network-on-chips; and DNA computing. This book is essential reading for researchers, research-focused industry designers/developers, and advanced students working on next-generation electronic devices and circuits.

Inspec keywords: integrated circuit design; high level synthesis; VLSI; SRAM chips; MOSFET; CMOS integrated circuits; integrated circuit interconnections; three-dimensional integrated circuits; carbon nanotubes; radiofrequency integrated circuits; MOSFET circuits; analogue integrated circuits; circuit stability; network-on-chip; nanoelectronics; digital integrated circuits

Other keywords: TSV inductors; voltage drop; FinFET SRAM circuits; on-chip gate delay variability measurement; process variation; nanoscale FinFET devices; static random access memory chips; radio frequency ICs; scaled technology node; 3D ICs; leakage-optimal digital IC design exploration; HLS technique; SPICEless RTL design optimization; CNT; carbon nanotube VLSI interconnects; digital ICs; lumped electro-thermal modeling; leakage power dissipation; temperature variation; high-level synthesis techniques; DNA computing; 3D NoC-based nanosystem design; write ability enhancement techniques; nanoelectronic digital integrated circuits; FinFET memory design techniques; through-silicon-vias inductors; nanoscale mobile electronics; thermal effects; nanoscale analog ICs; data stability; green on-chip inductors; self-healing analog circuit; post-CMOS electronics; nano-CMOS electronics; radio frequency circuits; PVT-aware SRAM; leakage power reduction; propagation delay; nanoelectronic circuit; post-manufacturing circuit performance metrics; voltage variation

Subjects: Semiconductor integrated circuit design, layout, modelling and testing; Insulated gate field effect transistors; Network-on-chip; Analogue circuit design, modelling and testing; Metallisation and interconnection technology; Microwave integrated circuits; Digital circuit design, modelling and testing; Fullerene, nanotube and related devices; Memory circuits; Fullerenes, carbon nanotubes, and related materials (engineering materials science); Semiconductor storage; General and management topics; Network-on-chip; CMOS integrated circuits; General electrical engineering topics

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