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Nano-CMOS and Post-CMOS Electronics: Devices and Modelling

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Editors: Saraju P. Mohanty 1 ; Ashok Srivastava 2
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Publication Year: 2016

The demand for ever smaller and portable electronic devices has driven metal oxide semiconductor-based (CMOS) technology to its physical limit with the smallest possible feature sizes. This presents various size-related problems such as high power leakage, low-reliability, and thermal effects, and is a limit on further miniaturization. To enable even smaller electronics, various nanodevices including carbon nanotube transistors, graphene transistors, tunnel transistors and memristors (collectively called post-CMOS devices) are emerging that could replace the traditional and ubiquitous silicon transistor. This book explores these nanoelectronics at the device level including modelling and design. Topics covered include high-k dielectrics; high mobility n and p channels on gallium arsenide and silicon substrates using interfacial misfit dislocation arrays; anodic metal-insulator-metal (MIM) capacitors; graphene transistors; junction and doping free transistors; nanoscale gigh-k/metal-gate CMOS and FinFET based logic libraries; multiple-independent-gate nanowire transistors; carbon nanotubes for efficient power delivery; timing driven buffer insertion for carbon nanotube interconnects; memristor modeling; and neuromorphic devices and circuits. This book is essential reading for researchers, research-focused industry designers/developers, and advanced students working on next-generation electronic devices and circuits.

Inspec keywords: system-on-chip; integrated circuit interconnections; III-V semiconductors; thin film devices; memristors; digital integrated circuits; CMOS logic circuits; integrated circuit reliability; integrated circuit modelling; hafnium compounds; statistical analysis; nanoelectronics; MIM devices; dislocation arrays; gallium arsenide; field effect transistors; carbon nanotubes; neural chips; high-k dielectric thin films; graphene devices; titanium compounds; capacitors

Other keywords: nanoscale devices; timing driven buffer insertion; device reliability; MIM capacitors; material level solution; Si; HfO2; metal interconnects; GaAs; CNTs; electrical properties; interfacial misfit dislocation arrays; nanoelectronics; high mobility p-channels; nanostructured anodic high-κ dielectrics; reliable power delivery networks; memristor modeling-static methodology; future generation integrated circuits; multiple-independent-gate field-effect transistor; statistical methodology; compound semiconductors; multiple-independent-gate nanowire transistors; TiO2; MIGFET; junction transistors; digital integrated circuits; high mobility n-channels; high-speed high-performance interconnect; 2D integrated circuits; FinFET based logic libraries; graphene transistors; post-CMOS electronics; advanced SoC design; doping-free transistors; nano-CMOS electronics; carbon nanotube interconnects; thin film device; neuromorphic devices; FinFET-based processors; memristor-based efficient neuromorphic realizations; stochastic methodology; on-chip capacitors; anodic metal-insulator-metal capacitors; technology scaling; neuromorphic circuits; metal-gate CMOS based logic libraries; logic libraries; next-generation processors; 3D integrated circuits; passive element

Subjects: Reliability; Dielectric materials and properties; Logic circuits; Fullerene, nanotube and related devices; Probability and statistics; General and management topics; System-on-chip; General electrical engineering topics; Neural net devices; Capacitors; Metallisation and interconnection technology; Fullerenes, carbon nanotubes, and related materials (engineering materials science); Thin film circuits; CMOS integrated circuits; Probability and statistics; Resistors; Insulated gate field effect transistors; System-on-chip; Semiconductor integrated circuit design, layout, modelling and testing; Neural nets (circuit implementations)

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