This paper introduce the basic concept, implementation, and engineering applications of graphics processor unit (GPU) acceleration of parallel FDTD method based on compute unified device architecture (CUDA). Several typical examples are employed to demonstrate the performance of GPU and VALU acceleration techniques.

Chapter Contents:

• 5.1 Introduction to GPU Architecture
• 5.2 Introduction to GPU Acceleration Techniques
• 5.2.1 Performance optimization in CUDA
• 5.2.2 Achieving parallelism
• 5.3 CUDA Implementation of FDTD Method
• 5.3.1 Coalesced global memory access
• 5.3.2 Thread to cell mapping
• 5.3.3 Use of shared memory
• 5.3.4 Optimization of number of threads
• 5.4 Engineering Applications
• 5.4.1 Introduction to hardware platforms
• 5.4.2 Loop microstrip antenna
• 5.4.3 Electromagnetic band gap structure
• 5.4.4 Stripfed dielectric resonator antenna
• 5.4.5 Square-ring patch antenna
• References

Inspec keywords: multiprocessing systems; parallel architectures; finite difference time-domain analysis; graphics processing units

Other keywords: graphics processor unit acceleration; CUDA; GPU acceleration technique; parallel FDTD method; VALU acceleration technique; compute unified device architecture

Subjects: Multiprocessing systems; Parallel architecture; Other numerical methods