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## Large-scale case study: accelerator for compressive sensing

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Biomedical wireless circuits for applications such as health telemonitoring and implantable biosensors are energy sensitive. To prolong the lifetime of their services, it is essential to perform the dimension reduction while acquiring original data. The compressive sensing is a signal processing technique that exploits signal sparsity so that signal can be reconstructed under lower sampling rate than that of Nyquist sampling theorem. The existing works that apply compressive sensing technique on biomedical hardware focus on the efficient signal reconstruction by either dictionary learning or more efficient algorithms of finding the sparsest coefficients. However, these works, by improving the recon-struction on mobile/server nodes instead of data acquisition on sensor nodes, can only indirectly reduce the number of samples for wireless transmission with lower energy. In this work, we aim to achieve both high-performance signal acquisition and low sampling hardware cost at sensor nodes directly.

Chapter Contents:

• 8.1 Introduction
• 8.2 Background
• 8.2.1 Compressive sensing and isometric distortion
• 8.2.2 Optimized near-isometric embedding
• 8.3 Boolean embedding for signal acquisition front end
• 8.3.1 CMOS-based Boolean embedding circuit
• 8.3.2 ReRAM crossbar-based Boolean embedding circuit
• 8.3.3 Problem formulation
• 8.4 IH algorithm
• 8.4.1 Orthogonal rotation
• 8.4.2 Quantization
• 8.4.3 Overall optimization algorithm
• 8.5 Row generation algorithm
• 8.5.1 Elimination of norm equality constraint
• 8.5.2 Convex relaxation of orthogonal constraint
• 8.5.3 Overall optimization algorithm
• 8.6 Numerical results
• 8.6.1 Experiment setup
• 8.6.2 IH algorithm on high-D ECG signals
• 8.6.2.1 Algorithm convergence and effectiveness
• 8.6.2.2 ECG recovery quality comparison
• 8.6.3 Row generation algorithm on low-D image patches
• 8.6.3.1 Algorithm effectiveness
• 8.6.3.2 Image recovery quality comparison
• 8.6.4 Hardware performance evaluation
• 8.6.4.1 Hardware comparison
• 8.6.4.2 Impact of ReRAM variation

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