In this computing paradigm, the computing unit can only process one task at a certain interval and wait for memory to update its results, because both data and instructions are stored in the same memory space, which greatly limits the throughput and causes idle power consumption. Although mechanisms like cache and branch prediction can partially eliminate the issues, the "memory wall" still poises a grand challenge for the massive data interchanging in modern processor technology. To break "memory wall," in-memory processing has been studied since 2000s and regarded as a promising way to reduce redundant data movement between mem-ory and processing unit and decrease power consumption. The concept has been implemented with different hardware tools, e.g., 3D-stack dynamic random access memory (DRAM) [69] and embedded FLASH [70]. Software solutions like pruning, quantization and mixed precision topologies are implemented to reduce the intensity of signal interchanging.

Chapter Contents:

• 2.1 Introduction
• 2.2 Neuromorphic computing devices
• 2.2.1 Resistive random-access memory
• 2.2.2 Spin-transfer-torque magnetic random-access memory
• 2.2.3 Phase change memory
• 2.3 Characteristics of NVM devices for neuromorphic computing
• 2.4 IMC architectures for machine learning
• 2.4.1 Operating principles of IMC architectures
• 2.4.1.1 In-macro operating schemes
• 2.4.1.2 Architectures for operating schemes
• 2.4.2 Analog and digitized fashion of IMC
• 2.4.3 Analog IMC
• 2.4.3.1 Analog MAC
• 2.4.3.2 Cascading IMC macros
• 2.4.3.3 Bitcell and array design of analog IMC
• 2.4.3.4 Peripheral circuitry of analog IMC
• 2.4.3.5 Challenges of analog IMC
• 2.4.3.6 Trade-offs of analog IMC devices
• 2.4.4 Digitized IMC
• 2.4.5 Literature review of IMC
• 2.4.5.1 DRAM-based IMCs
• 2.4.5.2 NAND-Flash-based IMCs
• 2.4.5.3 SRAM-based IMCs
• 2.4.5.4 ReRAM-based IMCs
• 2.4.5.5 STT-MRAM-based IMCs
• 2.4.5.6 SOT-MRAM-based IMCs
• 2.5 Analysis of IMC architectures

Inspec keywords: flash memories; DRAM chips

Other keywords: software solutions; embedded FLASH; in-memory computing; memory wall; memory space; power consumption; in-memory processing; redundant data movement reduction; 3D-stack dynamic random access memory

Subjects: Semiconductor storage; Memory circuits