Emerging fields like big data and IoT have brought a number of challenges for hardware as well as software design community. Some of the major challenges are to scale the computational and memory resources and the efficiency of the processing devices as per the growing needs. In the past few years, a number of fields have emerged for addressing these challenges. We focus on one of the prominent paradigms that have the potential to improve the resource efficiency regardless of the underlying technology, i.e., approximate computing (AC). AC aims at relaxing the bounds of exact computing to provide new opportunities for achieving gains in terms of energy, power, performance, and/or area efficiency at the cost of reduced output quality, typically within the tolerable range. We first provide an overview of AC and the techniques which are commonly being employed at different abstraction levels for alleviating the resource requirements of computationally intensive applications. Afterwards, a detailed discussion on component-level approximations and their probabilistic behavior by considering approximate adders and multipliers is presented. At the next step, a methodology used to construct efficient accelerators from these components will be discussed. The discussion will then be extended to approximate memories and runtime management systems. Toward the end of the chapter, we present a methodology for designing energy efficient many-core systems based upon approximate components followed by the challenges in adopting a cross-layer approach for designing highly energy, power, and performance-efficient systems.

Chapter Contents:

• 20.1 Introduction
• 20.2 Component-level approximations for adders and multipliers
• 20.2.1 Approximate adders
• 20.2.1.1 Low-power approximate adders
• 20.2.1.2 Low-latency approximate adders
• 20.2.2 Approximate multipliers
• 20.3 Probabilistic error analysis
• 20.3.1 Empirical vs. analytical methods
• 20.3.2 Accuracy metrics
• 20.3.3 Probabilistic analysis methodology
• 20.4 Accuracy configurability and adaptivity in approximate computing systems
• 20.4.1 Approximate accelerators with consolidated error correction
• 20.4.2 Adaptive datapaths
• 20.5 Multi-accelerator approximate computing architectures
• 20.5.1 Case study: an approximate accelerator architecture for High Efficiency Video Coding (HEVC)
• 20.6 Approximate memory systems and run-time management
• 20.6.1 Methodology for designing approximate memory systems
• 20.6.2 Case study: an approximation-aware multilevel cells cache architecture
• 20.7 A cross-layer methodology for designing approximate systems and the associated challenges
• 20.8 Conclusion
• References

Inspec keywords: memory architecture; resource allocation; multiprocessing systems; power aware computing; multiplying circuits; adders; parallel architectures

Other keywords: approximate computing; output quality; exact computing; energy efficient many-core systems; component-level approximations; approximate multipliers; memory resources; cross-layer approach; approximate adders; computationally intensive applications; processing devices; AC; computational resources; runtime management systems

Subjects: Storage system design; Parallel architecture; Operating systems; Logic and switching circuits; Multiprocessing systems