A heterogeneous system is the one that incorporates more than one kind of computing device. Such a system can offer better performance per Watt than a homogeneous one if the applications it runs are programmed to take advantage of the different strengths of the different devices in the system. A typical heterogeneous setup involves a master processor (the `host' CPU) offloading some easily parallelised computations to a graphics processing unit (GPU) or to a custom accelerator implemented on a field-programmable gate array (FPGA).This arrangement can benefit performance because it exploits the massively parallel natures of GPU and FPGA architectures.

Chapter Contents:

• 2.1 Outline
• 2.2 Background
• 2.2.1 OpenCL's hierarchical programming model
• 2.2.2 Executing OpenCL kernels
• 2.2.3 Work-item synchronisation
• 2.3 The performance implications of mapping atomic operations to reconfigurable hardware
• 2.4 Shared virtual memory
• 2.4.1 Why SVM?
• 2.4.2 Implementing SVM for CPU/FPGA systems
• 2.4.3 Evaluation
• 2.5 Weakly consistent atomic operations
• 2.5.1 OpenCL's memory consistency model
• 2.5.1.1 Executions
• 2.5.1.2 Consistent executions
• 2.5.1.3 Data races
• 2.5.2 Consistency modes
• 2.5.2.1 The acquire and release consistency modes
• 2.5.2.2 The seq-cst consistency mode
• 2.5.2.3 The relaxed consistency mode
• 2.5.3 Memory scopes
• 2.5.4 Further reading
• 2.6 Mapping weakly consistent atomic operations to reconfigurable hardware
• 2.6.1 Scheduling constraints
• 2.6.2 Evaluation
• 2.7 Conclusion and future directions
• Acknowledgements
• References

Inspec keywords: distributed databases; microprocessor chips; reconfigurable architectures; graphics processing units

Other keywords: parallelised computations; computing device; FPGA; heterogeneous system; GPU; CPU; performance per Watt; reconfigurable hardware; heterogeneous software

Subjects: Distributed databases; Computer architecture; Microprocessor chips